Speakers

Dr. Tim Michalka

Topic: Signal Integrity in High-Performance Electrical Design

Dr. Michalka has spent the last 20 years working primarily on the = electrical=20 aspects of electronic packaging and interconnections. He has a = bachelor=92s degree=20 in electrical engineering from the University of Maine, a master=92s and = Ph.D. in=20 electrical engineering from Stanford University. He has worked for = companies=20 such as Digital Equipment Corporation, Carborundum Microelectronics, and = Hewlett-Packard. He has developed power integrity analysis tools and = managed a=20 team delivering packaging design and signal integrity solutions for PA = RISC=20 microprocessors and custom high- performance ASIC. He is currently with = Qualcomm=20 Incorporated, San Diego, CA where he has been a principal engineer and = manager=20 of the Power & Signal Integrity Group since 2005. His team works = with=20 engineers nationwide to deliver leading edge wireless communications = intergrated=20 circuits and systems.

Dr. Mohsen Kavehrad

Topic: Toward 100G over Copper

Dr. Kavehrad is the W. L. Weiss (AMERITECH) Endowed Chair Professor = of=20 Electrical Engineering at The Pennsylvania State University. He holds a = Ph.D.=20 degree in Electrical Engineering from Polytechnic University. After = working for=20 companies such as Fairchild Industries, GTE, and Bell Laboratories he = joined the=20 Department of Electrical Engineering at the University of Ottawa as a = full=20 professor and director of the Broadband Communications Research = Laboratory. He=20 later was appointed founding director of the Center for Information and=20 Communications Technology Research (CICTR). He also was the CTO and a = vice=20 president at Tele-Beam Inc., State College, PA, and has served as a = consultant=20 to major corporations and government agencies.

Dr. Yun Ling, Engineer

Manager, Digital Enterprise Group, Intel Corporation

Topic: Signal Integrity of Complex Systems

Dr. Ling=92s main responsibility at Intel is to define, develop, and = enable=20 high-speed physical interfaces for Intel platforms. His technical areas = of=20 expertise include time- and frequency-domain signal integrity modeling = and=20 testing, EMC compliance, and thermal/mechanical development. Prior to = joining=20 Intel, Dr. Ling worked for AMP, Inc. focusing on contact physics and = mechanics=20 research. He earned a Ph.D. in mechanical engineering from SUNY = Binghamton. He=20 also taught for six years at Southeast University, China.

Dr. James Drewniak

UMR/MST EMC Laboratory, Missouri University of Science and = Technology

Topic: Via Transitions and Stubs at the PCB/Connector Interface: ISI = and=20 Jitter Consequences

James L. Drewniak holds a bachelor=92s, master=92s, and Ph.D. in = electrical=20 engineering from the University of Illinois at Urbana-Champaign. He = joined the=20 Electrical Engineering Department at Missouri S & T (formerly the = University=20 of Missouri-Rolla) in 1991 and is a faculty member in the = Electromagnetic=20 Compatibility Laboratory. His research and teaching interests include=20 electromagnetic compatibility in high-speed digital and mixed-signal = designs,=20 signal and power integrity, electronic packaging, electromagnetic = compatibility=20 in power electronic based systems, electronics, and antenna design. He = has=20 served as the chair of the EMC Society technical committees TC-10 Signal = Integrity, and TC-9 Computational Electromagnetics, and is currently an=20 associate editor for the IEEE Transactions on EMC.

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